[NZLUG] Privacy server

Martin D Kealey martin at kurahaupo.gen.nz
Fri Jun 21 16:34:27 NZST 2013

On Fri, 21 Jun 2013, Rob Connolly wrote:
> It means the build is able to make use of the hardware floating point
> support on the chip, rather than emulating those operations in software.
> This will be faster for programs doing lots of (floating point) maths,
> but I'm not sure why it should be faster overall, unless the kernel or
> low level libraries need to do floating point stuff.

As I understand it, the issue is that if a process does soft floating-point,
the emulation trap is exceedingly costly (effectively, two extra context
switches), and depending on how context switches are performed, other
processes may be penalized.

Mind you, even HW FP can have some bad effects on process scheduling; with a
coprocessor FPU, the FP-result-ready interrupt could arrive after the
initiating process had been switched out, necessitating an extra context
switch to store the results back into the appropriate process.


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